Clocks & timing

Optimize system-level performance with our clocks and timing devices

parametric-filterView all products
Get the best performance from your designs with our portfolio of low-jitter, easy-to-use clocks and timing devices. Build your clock tree with simple, discrete devices or highly integrated solutions that help solve your system timing needs. Learn how our devices enable industry-leading performance in a variety of applications.

Browse by category

Design & development resources

Design tool
Clock tree architect programming software

Clock tree architect is a clock tree synthesis tool that streamlines your design process by generating clock tree solutions based on your system requirements. The tool pulls data from an extensive database of clocking products to generate a system-level multi-chip clocking solution.

Application software & framework
Texas Instruments Clocks and Synthesizers (TICS) Pro Software

Texas Instruments clocks and synthesizers (TICS) pro software is used to program the evaluation modules (EVMs) for product numbers with these prefixes: CDC, LMK and LMX. These products include phase-locked loops and voltage-controlled oscillators (PLL+VCO), synthesizers and clocking devices.

Application software & framework
Texas Instruments PLLatinum Simulator Tool

PLLATINUMSIM-SW is a simulation tool that allows users to create detailed designs and simulations of our PLLatinum™ integrated circuits, which include the LMX series of phase-locked loops (PLLs) and synthesizers.

Why choose our clocks & timing portfolio?


Innovative technology

Our industry's highest performance clocking products utilize integrated BAW resonator technology, advanced CMOS and SiGe processes, all manufactured at TI factories.


Built for reliability

BAW technology enables high resiliency to harsh environmental conditions such as mechanical shock and vibration and achieves 100x better MTBF compared to quartz-based solutions.


Broad portfolio

Our clocking portfolio offers multisource and high-performance solutions for enterprise, telecom, broad industrial, test and measurement, defense and aerospace leveraging 60+ years of space expertise.


Dedicated design tools and resources

Simplify your design process using our Clock Tree Architect, PLLatinum Simulator, and TICS Pro tools to select, simulate performance, and program our clocking products.

Clocking application standard trends

Network synchronizers with BAW VCO for Wireless and Ethernet-based networking applications

TI’s network synchronizers are designed to meet the stringent jitter cleaning, wander attenuation, reference clock generation, and hitless switching. IEEE-1588v2 Precision Time Protocol (PTP) software stack, servo loop, device drivers, source code, and optional firmware are provided along with the hardware solution.
  • Targeted for wired and wireless networking: 56G/112G/224G PAM-4 SerDes for ethernet-based networking, 4G/5G macro, AAS, RRU, BBU core modules and small cell wireless communications. 
  • Industry leading timing accuracies and compliance: Full timing support, 1PPS signal deviation is far less than +/-5 ns. Partial timing support, less than +/- 1µs with PDVs in excess of 230µs. Compliant for PTP telecom profiles G8275.1 and G.8275.2.
Application note
ITU-T G.8262 Compliance Test Results for the LMK5C33216
Application report for ITU-T G.8262 compliance test 
White paper
TI BAW technology enables ultra-low jitter clocks for high-speed networks
TI BAW technology enables ultra-low jitter clocks for highspeed networks
Featured products for PTP
LMK5C33216 ACTIVE Ultra-low jitter clock synchronizer with JESD204B for wireless communications with BAW
LMK05318B ACTIVE Ultra-low jitter single channel network synchronizer clock with BAW
LMK5B33216 ACTIVE 16-output, three DPLL and APLL, network synchronizer with integrated 2.5-GHz bulk-acoustic-wave VCO

Clocking solutions that enable synchronized interfacing between data converters and FPGAs

We designed our portfolio of high-performance radio-frequency phase-locked loops (PLLs) and synthesizers, JESD204-compliant high-frequency clock distribution products, and multifunctional jitter cleaners and synchronizers to meet clocking requirements for JESD204B and JESD204C applications.
  • Generate phase synchronous clocks: Our devices include features such as system reference (SYSREF) generation, phase sync, output clock-phase adjustment, input-to-output zero-delay modes and SYSREF widowing to enable precise timing between gigahertz clocks and SYSREFs.
  • Ultra-low noise: Our PLLs, equipped with multi-core VCOs, external VCO support and external phase-detector support, help meet the most stringent phase-noise requirements.
User guide
How to Phase Synchronize Multiple LMX2820 Devices
Explains the theory of phase synchronization with LMX2820, the limitations of phase synchronization, and demonstrates how to set up synchronization in a step-by-step guide
Application note
LMX1204 Multiplier Clock Distribution Drives Large Phased-Array Systems
Describes how to distribute a low phase-noise clock or local oscillator (LO) signal across many channels and also how to employ an integrated multiplier operating between 3.2- and 6.4-GHz output
Technical article
Multi-channel RF transceiver, low-noise clocking reference design for radar and EW applications
This reference design demonstrates LMX2820 and LMK04832-based low-noise JESD204B-compliant clocks and provides multiple AFE7950s.

PCI Express (PCIe) clocks and timing: Gen 1, Gen 2, Gen 3, Gen 4, Gen 5, and Gen 6

PCIe applications have expanded far beyond the original PC market to include data center, automotive, and communication network applications. TI has a full PCIe product portfolio including clock generators, fanout buffers, oscillators, and clock muxes. TI's devices support all PCIe clocking architectures including Common Clock with/without SSC, SRNS, and SRIS.

  • System benefits: Industry-leading ultra-low jitter (28 fs max RMS additive), flexible output formats including LP-HCSL, low propagation delay, high PSNR, flexible power-up sequence, and a power supply ranging from 1.8V to 3.3V.
  • Ease of use: TI's PCIe Portfolio offers pin-to-pin compatible oscillators, buffers, and reference-less clock generators that come in small package sizes.
Featured products for PCIe applications
CDCE6214-Q1 ACTIVE Ultra-low power clock generator supporting PCIe gen 1-5 with 2 inputs, 4 outputs and internal EEPROM
CDCDB2000 ACTIVE DB2000QL compliant 20-output clock buffer for PCIe® Gen 1 to Gen 5
NEW LMK6H ACTIVE Low-jitter, high-performance, bulk-acoustic-wave (BAW) fixed-frequency HCSL oscillator

Technical resources

Video series
Video series
TI Precision Labs - Clocks & Timing videos
Develop your clocks and timing expertise with our comprehensive curriculum of training videos that cover key topics from fundamental terminology and factors of system noise to more advanced design considerations.
Application note
Application note
Multi-Clock Synchronization
Learn how to synchronize multiple devices by either a divider reset, 0-delay, or combination of both methods.
document-pdfAcrobat PDF
Technical article
Technical article
How to select an optimal clocking solution for your FPGA-based design
Learn more about the key factors in choosing a clocking solution for FPGA-based applications.